Drop all objection manually in UVM

Test requirement is like,

1) When polling for more than one interrupts by continuously reading different registers in parallel and based on some indication move to next phase of UVM

2) Waiting for some timer to be expired and then moving to next phase of UVM

Let’s take one scenario where,

Driver is raising objection but never dropping objection and requirement is to move to next phase (extract_phase) after #50 timeunit. But because all the objection are not dropped in run_phase, simulation is not going to extract_phase.

Let’s go through example.

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Now let’s take another scenario,

Here driver is dropping objection after #105 timeunit. So simulation will move to next phase after #105. But the requirement is to move to next phase which is extract_phase after #50.

Let’s go through example.

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To fulfill the requirement we need to any how drop the pending objection after #50 to move to next phase after #50.

We can do this by getting list of all uvm_components (through get_objector method of uvm_objection class) who raised objection and then we can manually drop the objection after #50 timeunit.

Let’s go through example.

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Reference:

1) uvm_objection.svh file 

Automatic raise/drop objection with UVM-1.2

Variable uvm_sequence_base::starting_phase is deprecated and replaced by two new methods set_starting_phase and get_starting_phase, which prevent starting_phase from being modified in the middle of a phase. This change is not backward-compatible with UVM 1.1, though variable starting_phase, although deprecated, has not yet been removed from the base class library.

New method uvm_sequence_base::set_automatic_phase_objection causes raise_objection and drop_objection to be called automatically around a sequence, avoiding the need to call raise/drop_objection manually in one common situation.

Lets understand it trough below mentioned example.

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Ref:
1) https://www.doulos.com/knowhow/sysverilog/uvm/uvm-1.2/